A switch driver, also frequently referred to as a gate driver, is a circuit that can accept a typically low-current, logic-voltage-level external input signal, and then level-shift and amplify the input signal to produce a higher-current and usually wider voltage-level output, which is coupled to drive the gate of a power transistor (such as a power metal-oxide-semiconductor-field-effect-transistor (MOSFET), or an insulated-gate-bipolar-transistor (IGBT)), thereby switching ON/OFF the power transistor at high speeds. Because of intrinsic parasitic capacitances, a power transistor is considered a capacitive load for a switch driver, which essentially charges or discharges the power transistor during switching transitions. A switch driver can also be used to drive other types of equivalent capacitive loads, such as digital bus lines.
It is very common for a switch driver to comprise a complementary or totem-pole output that is based on a p-channel field-effect-transistor (FET) at the top and an n-channel FET on the bottom with drain terminals of the 2 FETs being coupled to form a common output node. FIG. 1 illustrates a typical prior-art switch driver 100 comprising: a p-channel FET 101 including a gate terminal, a source terminal, and a drain terminal, wherein the source terminal is coupled to an output-drive power supply VDRIVE; an n-channel FET 102 including a gate terminal, a source terminal, and a drain terminal, wherein the source terminal is coupled to a ground potential relative to the VDRIVE, and wherein the drain terminal is coupled to the drain terminal of the FET 101 thereby forming a complementary output node which is operable to be coupled to drive an external power transistor switch 130 (via an optional gate resistor (not shown), if it is necessary to reduce ringing introduced by parasitic lead inductance); a pre-driver circuit 110, powered by the VDRIVE, and operable to be coupled to drive the gate terminals of the FETs 101 and 102 by switching one FET on while switching the other FET off during a switching transition; an input-buffer and level-shifter circuit 120, being powered by both a logic-voltage-level power supply VLOGIC and the VDRIVE, to buffer and level-shift an external input signal at node 150 from VLOGIC level to VDRIVE level, and coupled to drive the pre-driver circuit 110. If during a switching transition, both the FETs 101 and 102 are partially or completely turned on simultaneously by the pre-driver circuit 110, cross conduction occurs, and a relatively large momentary shoot-through current runs through the FETs 101 and 102, resulting in low driving efficiency and potentially overheating the prior-art switch driver 100. Therefore, the prior-art switch driver 100 usually contains complicated circuits to minimize or hopefully eliminate cross conduction in the complementary output when the prior-art switch driver 100 operates within a specified junction temperature range.
There are switch driver designs that can minimize or prevent cross conduction at complementary outputs by complicated logic circuits and/or timing circuits. U.S. Pat. No. 6,538,479 (Bellomo et al.) discloses a switch driver circuit, which includes an adaptive anti-cross-conduction mechanism based on two power-on detectors, each of which is coupled to a respective complementary-output FET; when a power-on detector detects that a corresponding FET is still on, the switch driver circuit prohibits the other FET from being turned on.